Ultra-low Power Low Voltage Lock-in Amplifier for Embedded Applications

The phase-sensitive or lock-in amplifier is capable of extracting excessively low signals in the presence of relatively high noise. In the past several years there has been an increased interest in portable or embedded lock-in amplifiers for instrumentation and sensing purposes. The fundamental approach of a lock-in amplifier is to make the physical quantity to be measured periodic, shifting the DC signal in this way to a known frequency and thus avoiding a high level of low-frequency flicker noise. In this Instructable we will present the possibility of ultra-low power, low voltage (single supply), lock-in amplifier for portable or embedded applications circuitry design based only on the SLG88104 Rail to Rail I/O 375 nA Quad OpAmp and passive components.

Below we described steps needed to understand how to program the amplifier. However, if you just want to get the result of programming, download GreenPAK Designer software to view the already completed GreenPAK design file. Plug the GreenPAK Development Kit to your computer and hit the program to create the system.

The block schematic of the proposed lock-in amplifier circuitry is presented in figure 1. The Quadrature Oscillator generates two phase shifted pulsed voltage signals P (in phase) and Q (in quadrature). The in phase signal is also used to power up the Sensor. The signal from the Sensor is amplified by the Differential Preamplifier and then brought to the inputs of Amplifier and Multiplier where it has been amplified (the overall signal processing chain has three relatively low gain amplifiers in order to keep large bandwidth) and multiplied by the in phase and in quadrature signals. After the multiplications, the signals have been added by the Adder in order to eliminate the possible phase shift of the Sensor. After the filtration by the low-pass Filter and amplification by the Amplifier the output signal Vout is proportional to the measured physical quantity.

In order to fulfill all these requirements, the corresponding circuitry can be successfully produced based only on the SLG88104 Rail to Rail I/O 375 nA Quad OpAmp and passive components. For the complete circuitry, eight operational amplifiers (two SLG88104 chips) and a relatively low number of passive components (resistors and capacitors) are sufficient.

The corresponding signals of the presented lock-in amplifier block elements are depicted in figure 2. The first two time diagrams represent the output signals of the Quadrature Oscillator, which generates two phase shifted pulsed voltage signals with a phase shift of 90°. The voltage levels of these two signals are marked with logic levels “0” and “1”, since they serve to power up and down (switch on and off) the corresponding operational amplifiers.

The third diagram represents the time dependence of the voltage signals at the outputs of the second stage Amplifiers, which deliver the voltage signals to the Multipliers inputs. These signals have the value as shown in Formula 1, where VB = VDD/2 is the common mode voltage (virtual ground) of the circuitry and VDD is the power supply voltage (we need virtual ground as we have single power supply), ΔV is the amplified Sensor signal with respect to the virtual ground, which is given by ΔV = GA1VS(t), where G is the Differential Preamplifier gain, A1 is the second stage Amplifier amplification and VS(t) is the slow varying voltage signal at the Sensor output, τ is the time delay (or equivalently phase shift) of the Sensor, Differential Preamplifier and second stage Amplifier, T is the period of oscillation of the Quadrature Oscillator, and k is an arbitrary integer number.

After the multiplication that has been performed with the help of the Multipliers, at their outputs we have voltage signals, which time dependences are depicted in the fourth and fifth diagrams of the figure 2. These signals have the value from Formula 2.

After the multiplication, the signals are added with the help of the Adder and at its output we have the signal as given in Formula 3.

The low-pass Filter at its output generates the average value of the input voltage signal, so the corresponding signal is given in Formula 4.

The last equation reduces to Formula 5.

which gives the Filter output voltage signal that is independent on the time delay (phase shift) but only on the sensor signal. Finally, the output signal is amplified by the third stage Amplifier, where the output voltage is given by Vout = A2(VF-VB) and where A2 is the third stage Amplifier amplification. Therefore, at the circuitry output we have the corresponding signal with respect to the virtual ground equal to the value in Formula 6.

The realization of the lock-in amplifier circuitry will be based on the unique characteristics of the SLG88104 Quad OpAmp. The use of these operational amplifiers will enable us to design low voltage, ultra-low power, low-noise circuitry that at its outputs will provide the voltage signal proportional to the measured physical value. Due to the unique characteristic of the phase-sensitive detection of the lock-in amplifier, the output voltage signal will provide very precise information about the measured physical value even if the high level of noise is present. It is worth mentioning that these operational amplifiers are sufficient for the complete design even in the case of multiplication where typically the analog multiplier or the analog switch have been used.

The design with the SLG88104 Quad OpAmp offers several advantages. First, it has a relatively low corner frequency of flicker noise. Based on the datasheet parameters, this corner frequency is estimated to be approximately 0.7 Hz. Therefore, we can use the quadrature oscillator frequency of only about 100 Hz (where the noise floor has been reached) that provides us the possibility of using large resistors in the design of the quadrature oscillator and thus ultra-low power consumption. This low oscillating frequency enables us also the possibility of designing the corresponding amplifiers with relatively large gains as the gain-bandwidth product of this operational amplifier is 10 kHz. Second, another important feature of the SLG88104 Quad OpAmp is the possibility of powering it down by the PDi (i = 1,2,3,4) inputs. This allows us to make a multiplication of the signal at the output of the Differential Amplifier and the corresponding in phase (P) and in quadrature (Q) signals from the pulsed Quadrature Oscillator. In order to prove this concept, we built a test circuit, as presented in figure 3. (a), where the corresponding signals of the signal generator (SG) and the output signal (OS) are depicted in figure 3. (b) The pulsed signal from the signal generator (SG) is brought to the PD input of the operational amplifier.

According to the captured oscilloscope image shown in figure 3 (b), one can notice that the signal multiplication is possible with the quadrature oscillator frequency of about 100 Hz. Therefore, there is no need of employing another analog voltage multiplier or analog switch since the SLG88104 has the possibility of such multiplication that can satisfy the needs of lock-in amplification.

Based on the analysis presented above and the block schematic, the suggested electrical schematic of the lock-in amplifier circuitry is given in figure 4.

Regarding the input of the lock-in amplifier, it typically depends on the type of sensor used. For example, in figure 4., the resistive sensor RS is used. This type of sensor changes its resistivity when some physical parameter such force, pressure, temperature, etc., acts on the sensor. The output of the lock-in amplifier is the voltage signal, which is proportional to the measured physical value. In order to describe in details the choices of the parameters of each part of the lock-in amplifier each of its segments will be separately analyzed in the following text.  

The suggested circuitry has a single power supply that is made of a voltage source of VDD = 3 V. This power supply can be made of two standard type batteries having 1.5 V each connected in series. In order to make a full span of the output voltage values, the common mode voltage (virtual ground) must have half of the value of the power supply voltage, or VB = VDD/2 = 1.5 V. Therefore, the resistor values RB1 and RB2 must be the same and must have large values in order to reduce power consumption. The chosen values of these resistors are: RB1 = RB2 = 1 MΩ. Capacitor CB1 serves to filter the noise and must also have a large value. In the suggested design the capacitor CB1 was realized as the parallel connection of two capacitors having the values 100 μF and 220 nF.

As mentioned earlier, Quadrature Oscillator serves to generate two pulsed, phase shifted voltage signals for gating the corresponding operational amplifiers. In order to reduce the power consumption, the resistors RI, RT1, RT2 and RT4 must have large values. In the suggested design, based on the circuit testing, the following values have been chosen: RT1 = RT2 = RT4 = 1 MΩ and RI = 700 kΩ. In order to have oscillating frequency near to 100 Hz the capacitor value has been chosen to be CI = 2.2 nF. In general case, the oscillating frequency can be estimated according to the ralation shown in Formula 7.

which is equal to fQO ≈ 162 Hz for the suggested resistors and capacitor values. The resistor RT3 doesn’t need to have large value. In order to reduce the hysteresis of the Schmitt trigger and thus to reduce the additional phase shift of the in quadrature signal, the resistor value must be low or as chosen RT3 = 1 kΩ. Further, in order to prove the concept of the quadrature oscillator as presented in figure 4, a simulation has been performed with results presented in figure 5. Here we can easily see that in phase (P) and in quadrature (Q) signals are phase shifted for 90° and with the frequency of 135 Hz.

The suggested Differential Preamplifier has the topology that the resistive sensor RS is incorporated in it. As the power consumption of the circuitry is a major concern, the values of the resistors RF and RL have been chosen to be large enough, i.e. RF = RL = 1 MΩ. The values of the resistors RS (the sensor) and RB must be chosen in a way that the Differential Preamplifier is capable of amplifying a pulsed signal with a frequency greater than 100 Hz without distorting it. Therefore, the optimal values of these resistors are RS = RB ≈ 100 kΩ. A bandwidth of approximately 1 kHz has been achieved in the case of the such designed Differential Preamplifier. The output signal of the Differential Preamplifier with respect to the power supply negative node is given in Formula 8.

Typically, the sensor resistance RS varies with respect to its nominal value as shown in Formula 9.

where RS0 is the sensor nominal resistance and ΔRS is the resistance variation caused by some physical quantity to be measured. In the case where ΔRS << RS0 and RS0 = RB is met, we have in Formula 10.

According to equation (10) the Differential Preamplifier output signal consists of two parts, the slow varying part proportional to the common mode voltage VB and the fast varying part proportional to the in phase signal P. The role of the High-Pass Filter is to remove the slow varying signal and also the offset voltage as well as the low frequency flicker noise of the Differential Amplifier. Therefore the signal at the filter output is given in Formula 11.

where P' is the time delayed (i.e. phase shifted) version of the in phase signal P, i.e. P'(t) = P(t-τ), where τ is the time delay of the Differential Preamplifier and High-Pass Filter combined, which is in this case very small as compared to the period of the Quadrature Oscillator and VB is the voltage that was added due to the virtual ground of the High-Pass Filter. In order to achieve cut-off frequency of about 1 Hz and low output current of the Differential Preamplifier, the following values were chosen: CHPF = 220 nF and RHPF = 1 MΩ.  

The Amplifier and Multiplier has a dual role, i.e. to simultaneously amplify the signal from the High-Pass Filter and to perform digital multiplication by gating the operational amplifiers. The output signals of the Amplifier and Multiplier are given in Formula 12.

where P and Q are inverted digital signals of the Quadrature Oscillator in phase P and in quadrature Q signals, respectively. The inverted versions of the signals were taken into account as the operational amplifier powers off when its PD input is connected to the high level signal. The inverted signals P and Q are also in quadrature. In order to achieve relatively high gain without distorting the signal and simultaneously keeping low power consumption, the following values for the resistors were chosen: RG1 = 100 kΩ and RG2 = 1 MΩ.  

Adder, Filter, and Amplifier has a triple role, i.e. to simultaneously sum the output signals of the Amplifier and Multiplier, to perform low-pass filtration and to additionally amplify the signal. The sum of the signals occurs at the common node of the resistors RF1 and RF2, which also serve as the low-pass filter components. According to the Thévenin’s theorem, at this particular node, the signal has the value from Formula 13.

Finally, after the filtration and additional amplification, the output signal, with respect to the virtual ground (VB), i.e. we measure the output signal deviation from the common mode voltage, has the value as in Formula 14

where the analysis of the lock-in amplification signal processing chain, as presented in figure 1, has been considered, and where α is the proportionality factor which value depends on the operational amplifier gating process (switch on and off). In order to keep low power consumption, sufficient amplification and filtration with the second order Butterworth filter with approximately 1 Hz of the cut off frequency, the following values have been chosen: RA1 = 100 kΩ, RA2 = 1 MΩ, RF1 = 2 MΩ, RF2 = 1 MΩ, CF1 = 56 nF, and CF2 = 390 nF.  

We built the test circuitry setup based on two evaluation boards for the SLG88104 Quad OpAmp and the NTC thermistor for temperature measurement B57164K0104 from TDK Corporation, which is available for the price of about $1 USD. The photo of the proto-board realized circuitry and the complete measurement and test setup is given in figure 6. The photo of the circuitry only is presented in figure 7., where the lower evaluation board is used for realization of the common mode voltage (virtual ground) and the quadrature oscillator, and the upper evaluation board is used for realization of differential preamplifier, amplifiers and multipliers, adder, filter and amplifier.

In order to test the circuitry for temperature measurements we placed the NTC thermistor together with the calibration thermocouple into the test tube thus ensuring the same temperature of both sensors. The test tube is immersed into the water bath that was previously heated and then left to cool down. The temperature was also checked with the help of a control thermometer. The thermocouple temperature was measured with the digital multimeter that was also used for simultaneous measurement of the circuitry output signal.

The NTC thermistor resistance changes with the absolute temperature change in the way illustrated in Formula 15.

where RS0 is the thermistor nominal resistance at the absolute temperature T0 and B is the thermistor parameter. For the thermistor used we have: RS0 = 100 kΩ, T0 = 298.15 K (+25°C), and B = 4600 K. Based on equation (15), the thermistor sensitivity for a narrow temperature range around the nominal temperature T0 can be defined as shown in Formula 16.

where the thermistor resistance change can be defined as in Formula 17 where ΔT is the thermistor temperature change with respect to the nominal temperature.

From Formulas (14) and (17) we have Formula 18.

where K is the sensitivity of the sensing system. As the water bath was slowly cooled, the temperature was captured simultaneously with the thermocouple and digital multimeter and with the NTC thermistor in tandem with the presented sensor circuitry. The output voltage was also measured by the digital multimeter and the results are presented in figure 8. The temperature sampling was performed periodically. The temperature range that is possible to measure with this circuitry is from +17°C to +32°C because the circuitry reaches saturation voltages of ±1.575 V at these minimum and maximum temperatures. The measured sensitivity was obtained according to the diagram presented in figure 8 and it is estimated to be K ≈ 0.22 V/°C.

We tested the proposed design of the quadrature oscillator, whose outputs are presented in figure 9. One can notice from figure 9. that the quadrature oscillator output signals (in phase P and in quadrature Q) are phase shifted for approximately 90° and the oscillating frequency is approximately 130 Hz, which is very close to the simulated value of 135 Hz.

The most prominent feature of the lock-in amplification is the suppression of the high levels of low frequency flicker noise that cannot be seen from the above presented work. The aim of the above presented measurements is to prove the concept of such a designed lock-in amplifier. As shown, it is possible to measure a real physical quantity, such as the temperature, with the help of an appropriate sensor and the proposed ultra-low power low voltage lock-in amplifier circuitry. In order to test the noise suppression of the lock-in amplifier, long-term stability of the circuitry was performed. Instead of NTC thermistor, a dummy metal film resistor with the same resistance as the nominal resistance of the thermistor was employed. In this way, we test the stability only of the lock-in amplifier thus eliminating the influence of the sensor, which is irrelevant for this measurement. The output lock-in amplifier voltage has been measured for 24 hours in a non-air-conditioned room. During the measurement, the room temperature was changed in the range from +17°C to +23°C. The output signal was sampled with the help of a 12-bit digital acquisition card with a sampling frequency of 2 Hz (bandwidth of the lock-in amplifier is approximately 1 Hz). The input voltage range of the digital acquisition card was set to ±2 V (full scale range FSR = 4 V) thus providing the resolution (less significant bit value) of LSB = FSR/(2n-1) = 0.977 mV (for n = 12 bits resolution). The measured voltage is presented in figure 10.

The measured standard deviation of the lock-in amplifier output noise signal is σV = 1.4 mV. Taking into account that the overall sensor sensitivity in temperature measurement with the presented NTC thermistor is K ≈ 0.22 V/°C, the resolution in the temperature measurement is equal to σT = σV/K ≈ 0.0064°C. Bearing in mind that the digital acquisition card quantization noise standard deviation is given in Formula 19, we have fulfilled Formula 20, and as the noises of the lock-in amplifier and the digital acquisition card are independent (two independent devices), one can conclude that all the measured noise originates from the lock-in amplifier. The power spectral density of the measured output noise signal, presented in figure 10, is presented in figure 11.

The presented power spectral density spans from1 μHz up to 1 Hz, which is deeply located in the range of the flicker noise of the SLG88104 Quad OpAmp (as can be seen from the datasheet flicker noise corner frequency is approximately located at 0.7 Hz). One can expect that in this range we have an increase in the noise power spectral density starting from 1 Hz and going toward lower frequencies. However, this cannot be observed in the measured output noise power spectral density. Moreover, the power spectral density decreases as approaching lower frequencies. There is only a sharp increase in the power spectral density at very low frequencies (~2×10-5 Hz – ~7×10-6 Hz). The reason for this increase is limited only by the measurement time (measurement was performed for 24 hours). One can estimate the noise floor of the lock-in amplifier output noise at approximately Vn ≈ 10 μV/√Hz, which translates to the noise floor of about Tn ≈ 45 μ°C/√Hz in the temperature measurement. We have also obtained a noticeable noise source at 0.2 Hz (as can be seen from figure 11.) of unknown origin.

Finally, in order to prove the ultra-low power consumption statement, we measure the bias current of the circuitry. It was measured that the complete circuitry consumes 16 μA, which in combination with the measured power supply voltage of 3.15 V gives the overall power consumption of approximately 51 μW. This low value can be decreased even more with the help of the larger resistance values (larger than 1 MΩ). However, larger resistance values are followed by correspondingly larger voltage noise. Based on the datasheet parameters, the input voltage noise density of the SLG88104 is 195 nV/√Hz, which is still larger than the voltage noise density of a 1 MΩ resistor that is equal to 129 nV/√Hz.

Conclusion

The ultra-low power low voltage lock-in amplifier circuitry we described in this Instructable is capable of providing high performance measurement that offers phase sensitive measurement. Flicker noise, which is the predominant noise component in any sensing system aimed for measuring slowly varying physical values such as temperature, force, pressure, etc. is effectively suppressed by the suggested design. The introduction of this low voltage, ultra-low power measurement system that can be easily battery powered, now opens broad new applictions. Furthermore, the circuitry has a very unique design that can be tested with different types of sensors thus proving the concept of the circuit design. Moreover, the result of this test can be used in order to improve the design in a way to reach higher-precision and wider bandwidth. Finally, by choosing larger resistor values one can further reduce the power consumption with the tradeoff of increased noise and lower measurement resolution.