Equations
********** Mapped Logic **********
A <= '0';
B <= CLK_IN;
C <= '0';
CLK_1P <= NOT CLK_IN;
CLK_2P <= CLK_IN;
CLKx3 <= CLK_IN;
Register Legend:
FDCPE (Q,D,C,CLR,PRE);
FTCPE (Q,D,C,CLR,PRE);
LDCP (Q,D,G,CLR,PRE);